International Affairs Team

Research

Adaptive Wireless Charging for Implantable Medical Devices

Abstract This paper presents a wireless power transfer (WPT) system that maintains high efficiency and low output voltage ripple under large variations in coupling and load conditions. To address these variations, the proposed system employs an adaptive mode switching scheme with coupling-insensitive sensing. This is implemented using a fixed-reference sensor topology with filtered integrated sensor outputs and synchronization of RX 0X-to-1X transitions with TX 0X-to-1X mode transitions. For stable output regulation, a voltage-racing hysteretic controller is introduced to achieve low output voltage ripple, which is difficult to obtain with conventional analog feedback- or comparator-based hysteretic controllers. In addition, an on-chip load detector enables automatic detection of heavy- and light-load conditions. Fabricated in a 0.18- μ m BCD process, the proposed system was measured with coil distances from 7 to 20 mm, corresponding to coupling coefficient (k) variations from 0.42 to 0.08. The system supports an output power range from 2.6 mW to 147 mW while achieving a low ripple voltage of 18 mV and achieves a peak end-to-end efficiency of 69.1%. Implantable medical devices must continue operating reliably despite the body's constant movement—from walking and breathing to simply changing position during sleep. But those everyday movements can disrupt wireless charging by altering the alignment between the external charger and the implanted device. Researchers at UNIST have developed a wireless power transfer system that adapts to changes in body movement and device power demand. By maintaining stable power delivery while reducing unnecessary energy loss and heat generation, the system could make long-term wireless powering of implantable medical devices more practical. Many implantable medical devices alternate between active treatment and standby modes, causing their power requirements to change over time. At the same time, body movement can shift the distance or alignment between the transmitter and receiver coils, reducing wireless charging efficiency. Together, these challenges make it difficult to deliver stable power when and where it is needed. Led by Professor Franklin Bien of the Department of Electrical Engineering, the team designed the system to distinguish changes in device power demand from changes in coil alignment caused by body movement. Rather than relying solely on signal strength, it detects characteristic changes in communication between the transmitter and receiver, allowing it to switch reliably between high- and low-power modes as charging conditions change. The researchers also developed a new Voltage-Racing Hysteretic Controller (VRHC) to stabilize the receiver's output voltage. Instead of comparing voltages directly, the new controller detects voltage changes by measuring tiny differences in signal propagation time within the circuit. This allows it to respond more quickly and keep the output voltage remarkably stable. In laboratory tests, the system remained stable across transmission distances ranging from 7 mm to 20 mm. Even when the implanted device's operating current increased sharply from 6 mA to 16 mA, it maintained a constant 3.3 V output with a voltage ripple of only 18 mV. The system achieved a peak end-to-end power transfer efficiency of 69.1%, representing an improvement of up to 51.3 percentage points over a comparable design without the adaptive mode-switching technology. “Wireless charging systems need to adapt as conditions change, whether because a patient moves or a device's power demand shifts,” said Professor Bien. "By continuously adjusting power delivery in real time, our system improves both efficiency and stability. We hope it will help make implantable medical devices more practical for long-term use." The study was co-first authored by Sungmin Shin and Seongbin Kwon of UNIST. The research was supported by the Ministry of Science and ICT (MSIT) and the Institute for Information & Communications Technology Planning & Evaluation (IITP), and published in IEEE Transactions on Circuits and Systems I: Regular Papers (IEEE TCAS-I) on June 19, 2026. Journal Reference Sungmin Shin, Seongbin Kwon, Kiju Lee, et al ., "A Wireless Power Transfer System With Adaptive Mode-Switching Insensitive to Coupling Variations Achieving Low Ripple and High Efficiency," IEEE TCAS-I, (2026).

News

UNIST Brings Metal 3D Printing to Full-Scale Ship Propeller Manufacturing

Large ship propellers are still commonly made by casting molten metal in molds, a process that can take considerable time and material. UNIST and Ulsan-based 3D Factory are developing an alternative that combines metal additive manufacturing with AI to produce and validate a 5-meter-class propeller at full scale. The 54-month project will span design for additive manufacturing (DfAM), full-scale fabrication, performance validation, and classification approval. Led by the UNIST 3D Printing Convergence Technology Center in partnership with 3D Factory, the project will receive KRW 11 billion in funding, including KRW 8.5 billion in government support under the 2026 Shipbuilding and Marine Industry Technology Development Program of the Ministry of Trade, Industry and Energy (MOTIE). Producing a propeller at this scale presents particular challenges for additive manufacturing. Propeller blades have complex curved surfaces and varying thicknesses, while heat generated during metal deposition can cause distortion and residual stress that affect the final shape. The team will use wire arc additive manufacturing (WAAM), which melts metal wire with an electric arc and deposits it layer by layer. Because the process builds directly from digital designs without conventional molds, it could reduce production time and material waste while offering greater flexibility in manufacturing complex components. UNIST has previously highlighted 3D Factory's work applying WAAM to mobility manufacturing. To improve accuracy at this scale, UNIST will develop DfAM methods tailored to large propeller blades and use AI to analyze data from design, deposition, and inspection. By predicting thermal deformation and residual stress during fabrication, researchers aim to compensate for distortion before it occurs and improve the dimensional accuracy of the finished component. The technology could also have applications in naval maintenance, repair, and overhaul (MRO), where replacement or discontinued parts may be difficult to source. Manufacturing components directly from digital design data could allow parts to be produced closer to where they are needed and reduce reliance on conventional supply chains. UNIST and 3D Factory presented their metal additive manufacturing and AI-based manufacturing capabilities in Washington, DC, in July at the Openning Ceremony of the Korea-US Shipbuilding Cooperation Center and the Korea-US Joint R&D Technology Exchange Forum. The events brought the team together with representatives from the US Navy and the US shipbuilding industry. If successfully validated and certified, the technology could open opportunities to enter the US naval component supply chain and other overseas markets. The project is also expected to serve as a demonstration model for MASGA (Make American Shipbuilding Great Again), the Korea-US shipbuilding cooperation initiative. Ulsan City plans to support subsequent commercialization and overseas market development, drawing on the region's established shipbuilding and manufacturing base. “The key to this project is not simply producing a five-meter-scale component, but demonstrating DfAM and AI-based distortion compensation at full scale,” said Namhun Kim, Director of the UNIST 3D Printing Convergence Technology Center. “By combining UNIST's research capabilities with Ulsan's shipbuilding infrastructure, we aim to establish a new approach to manufacturing large ship components and develop it into a model for Korea-US shipbuilding cooperation.”

Research

A New Way to Harness Hot Electrons

Abstract Spin-active dopants offer a powerful yet largely unexplored route for controlling interfacial redox chemistry in quantum-confined semiconductors. Here we show that manganese doping in cadmium selenide quantum dots enables an ultrafast spin-exchange-mediated electron-transfer pathway that allows methyl viologen reduction even when conventional band-edge energetics are unfavorable for charge transfer. Femtosecond transient absorption spectroscopy reveals that manganese dopants accelerate electron-transfer dynamics by more than an order of magnitude while opening a hot-exciton reduction channel in which a manganese ion captures a photoexcited exciton prior to phonon-assisted cooling. Subsequent spin-flip relaxation of the excited manganese ion drives charge separation and reduction of a molecular acceptor. This mechanism operates efficiently across resonant and off-resonant (energy-uphill and downhill) regimes, identifying spin-exchange coupling—rather than band alignment—as the dominant factor governing electron-transfer rates and efficiencies. These findings establish magnetic doping as a viable strategy for harvesting hot carriers and enabling energetically demanding photocatalytic transformations. For decades, researchers have understood electron transfer in photocalysis through one guiding principle. Electrons move most readily when the energy levels of a semiconductor and a reacting molecule are well matched. Researchers at UNIST and Los Alamos National Laboratory (LANL) have demonstrated that spin interactions can provide an alternative pathway, allowing electron transfer even when conventional energy-level alignment is unfavorable. Professor Ho Jin of the Department of Chemistry at UNIST, in collaboration with Dr. Victor I. Klimov of LANL, showed that manganese ions inside semiconductor quantum dots (QDs) create an ultrafast spin-exchange pathway that channels hot-electron energy into photoreduction reactions. The findings offer a new way to design photocatalysts that make better use of sunlight for hydrogen production and carbon dioxide conversion. QDs readily transfer photoexcited electrons to nearby molecules, making them attractive materials for photocatalysis. Their most energetic electrons, however, lose excess energy almost immediately, leaving little time for useful chemical reactions to occur. The team addressed this challenge by introducing magnetic manganese ions into cadmium selenide (CdSe) QDs. Before hot electrons could cool, the manganese ions captured their excess energy through ultrafast spin exchange. As the ions returned to their original spin state, that energy drove electrons into nearby molecules, triggering photoreduction reactions that would otherwise be difficult to achieve. Using femtosecond transient absorption spectroscopy, the researchers followed the electron transfer process in real time. Compared with undoped QDs, manganese-doped particles transferred electrons to methyl viologen more than ten times faster, demonstrating that spin exchange provides an efficient pathway for charge transfer. The team then asked whether the mechanism truly depended on hot-electron energy. When larger QDs were illuminated with higher-energy light, photoreduction readily occurred. Under lower-energy illumination, the reaction largely disappeared. Together, these experiments showed that manganese captures the excess energy of hot electrons before it is lost as heat. “We have traditionally thought of energy-level alignment as the deciding factor in electron transfer,” said Professor Jin. “Our results show that spin exchange can provide an alternative pathway, giving us a new way to harness the energy of hot electrons for photocatalysis.” Professor Ho Jin served as the first author of the study. Their findings were published in Nature Communications on June 26, 2026. Journal Reference Ho Jin, Valerio Pinchetti, Connor Orrison, et al., “Ultrafast photoreduction driven by interfacial spin exchange in manganese-doped quantum dots,” Nat. Commun., (2026).

News

UNIST to Host ACS Publications Forum on the Future of Nanoscience

UNIST brought together leading scientific journal editors and early-career researchers on July 31 for the ACS Publications Forum: The Future of Nanoscience , a daylong program focused on emerging research across nanoscience and materials science. Co-hosted by ACS Publications and the UNIST School of Energy and Chemical Engineering, the forum was held under the theme ' ACS Editors' Forum with Early-Career Leaders in South Korea .' The program combined editor sessions, research presentations, panel discussions, and a poster session, creating opportunities for researchers at different career stages to exchange ideas and explore new connections. The forum featured Editor-in-Chief Teri W. Odom of Nano Letters, Editor-in-Chief Xiaodong Chen of ACS Nano, and Editor-in-Chief Suzie Pun of ACS Nano Medicine. Editors from Chemistry of Materials, ACS Nano, and Nano Letters, as well as representatives from ACS Publications, also participated. The afternoon Emerging Scholar Program highlighted research by early-career scientists from UNIST and other universities in Korea. Presentations covered battery chemistry and materials, energy conversion, catalysis, polymer self-assembly, stretchable electronics, optoelectronics, AI sensors, and two-dimensional materials, reflecting the breadth of current research across energy materials, soft matter, and electronics. The program also included a poster session featuring student research. A panel discussion with journal editors provided another opportunity to exchange perspectives on scientific publishing and emerging directions in nanoscience, while networking sessions connected editors, faculty members, and early-career researchers. Organized by Professor Hyun-Wook Lee of the School of Energy and Chemical Engineering at UNIST, the forum was designed to connect established journal editors with emerging researchers and strengthen scientific exchange across the nanoscience community. The event's broader research scope ranged from battery chemistry and energy conversion to stretchable electronics and polymer self-assembly.

Research

Smarter Design Method Improves Efficiency of In-Memory Computing Chips

Abstract Data-centric applications continue to be limited by the memory wall. Logic-in-Memory (LiM) architectures based on non-volatile memories (NVMs), such as memristors, offer a promising solution by enabling in-memory computation and eliminating costly data movement. While several approaches leveraging memristor-aided logic (MAGIC) operations have been proposed, many fail to fully exploit the parallelism and spatial efficiency of memristor crossbars, especially under physical design constraints. In this paper, we propose a parallelism-driven, area-aware look-up table (LUT)-based mapping framework of arbitrary logic circuits into a memristor crossbar using MAGIC operations. We present a crossbar-aware floorplanning strategy that leverages topological LUT information to enable two-directional parallel computation (ie, HNOR and VNOR), thereby maximizing computational LUTs with minimal execution cycles. We formulate an integer linear programming (ILP) approach to define the placement of each LUT and its fanin locations, improving routability while preserving parallelism. Moreover, we introduce our novel A∗-search-based fan-in routing method with Hanan grid that fully utilizes the aligned fans and intermediate results. Experimental results demonstrate that the proposed framework achieves maximum parallelism and crossbar utilization, thereby reducing cycle counts by 19.6% and ensuring that all benchmarks map successfully under strict area constraints. We also confirm the scalability and practical applicability of the proposed framework for large-scale logic mapping in memristor-based LiM systems. Modern computing is increasingly limited not by processing speed, but by the time and energy required to move data between memory and processors. Researchers at UNIST have developed an automated design framework that addresses this challenge by making logic-in-memory (LiM) chips more efficient. Led by Professor Heechun Park of the Department of Electrical Engineering, the team designed a framework that automatically optimizes the placement of logic circuits and data pathways in memristor-based LiM architectures. By enabling more operations to run simultaneously while making better use of limited chip area, the approach reduced the number of computation cycles by nearly 20% compared with existing state-of-the-art methods. Unlike conventional computer chips, LiM architectures perform computation directly where data are stored, reducing costly data movement between memory and processors. This approach helps overcome the memory wall where data transfer limits overall computing performance. The framework determines where computations are performed within a memristor crossbar array and how intermediate results move to the next operation. Unlike previous approaches, it enables computations to proceed in both the horizontal and vertical directions, allowing more operations to run simultaneously while making better use of the available chip area. The framework also reorganizes intermediate data during computation, freeing unused memory cells and reducing wasted space. It then identifies efficient routes for transferring intermediate results between computational blocks, preserving parallel execution even under tight area constraints. In benchmark evaluations, chips designed using the new framework required 19.6% fewer computation cycles than those designed using existing approaches. The framework also successfully mapped every benchmark circuit, including designs that previous methods could not accommodate under the same area constraints, suggesting it can scale to larger LiM systems. “The performance of LiM computing depends not only on the memory device itself, but also on how computations are organized within the array,” said Professor Park. "By arranging operations to maximize parallel execution, our framework improves efficiency while remaning practical under realistic area constraints." The research was conducted by Ikkyum Kim and Minhong Kim as first and second authors, respectively, with Professor Heechun Park serving as the corresponding author. The findings were published online in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD) on June 2, 2026. The research was supported by the National Research Foundation of Korea (NRF) and the Institute of Information & Communications Technology Planning & Evaluation (IITP). The EDA tool was supported by the IC Design Education Center (IDEC). Journal Reference Ikkyum Kim, Minhong Kim, and Heechun Park, “A Parallelism-Driven, Area-Aware Technology Mapping Framework for Memristive Logic-in-Memory,” IEEE TCAD , (2026).